The present invention relates generally to nanotechnology and in particular to a method of creating metallic and semiconducting nanowires, heterogeneous nanowires, and nanowire assemblies using a technique suitable for mass production.
Conductive, semi-conductive, and insulating nanowires hold great promise for the creation of new devices including small-scale electrical circuit elements, sensors, and the like. Of particular interest in this regard are metallic nanowires. The creation of relatively long molybdenum nanowires is described in a paper authored by the present inventor and published in Science 2001, 290, (5499), 2120-2123 hereby incorporated by reference. This particular fabrication technique employed highly oriented pyrolytic graphite (HOPG) as a substrate. Nanowires were formed through electrochemical step edged decoration (ESED) techniques in which edges on a terraced surface of the HOPG provided a deposition site for the electrochemically deposited nanowires following those edges.
Fabricating devices from nanoconductors can be difficult. In the above ESED technique, the produced nanowires have irregular orientation resulting from the difficulty of controlling the geometry of the step edges on the HOPG substrate. These variations also affect, to a lesser degree, the diameter of the wires produced. Production of the nanowires is further hampered by the fragile nature and expense of the HOPG. HOPG also contains numerous defects that result in particles forming in between the wires.
Nanowires have been fabricated by using a pocket formed under a layer of photoresist between the photoresist and a substrate as separated by a nanothickness layer of nickel. See “Lithographically Patterned Nanowire Electrodeposition”, E. J. Menke et al, Nature Materials 5, 914-919 (2006). This technique makes use of an edge of a larger pattern to define the location of the nanowire eliminating a need for nanoscale line widths in generating the pattern.